1. Field of the Invention
The invention relates generally to the field of semiconductor device manufacturing and, more particularly, to processes for forming films using solid state reactants.
2. Description of the Related Art
In advanced semiconductor devices, part of the silicon that is present in gate, source and drain structures, is converted into low-resistivity metal silicides. This is done to realize a conductive path with a low bulk resistivity on the one hand, and to ensure a good contact resistance on the other hand. In the past, TiSi2 was used for this process; currently CoSi2 is the silicide of choice for the most advanced devices. As both TiSi2 and CoSi2 consume a relatively large amount of silicon, it is expected that for devices to be used for the 65 nm technology node and beyond, there will be a switch to using NiSix to form these conductive paths. This silicide combines a low bulk resistivity with a relatively low amount of silicon consumption.
An idealized process of formation of NiSix on a substrate 80 is depicted in FIGS. 1a-1d. First, the basic structure of the transistor is formed, including a gate electrode 10, a gate dielectric 20, a source 30 and a drain 40 (FIG. 1a). On the sides of the polycrystalline silicon (poly-Si) gate, so-called spacers 50 are deposited to insulate the sidewalls of the poly-Si/gate oxide stack from films that are subsequently formed. A nickel film 60 (Ni) is then deposited, usually through a physical vapor deposition (PVD, e.g., sputtering) process (FIG. 1b). The wafer is heated to a temperature at which the Ni reacts with the underlying Si to form nickel silicide (NiSix) 70. Depending on the anneal temperature, NiSix as used herein can represent Ni2Si, NiSi, NiSi2 and/or a mixture thereof. The temperature is typically kept low enough (e.g., <about 600° C.) to avoid formation of NiSi2, which has a relatively high-resistivity.
In principle, NiSix forms in a self-aligned fashion, i.e., only at locations where Ni and Si are both present. In the illustrated arrangement, such locations have silicon exposed below the metal Ni layer. Thus, ideally, no silicide growth takes place at the position of the spacers 50 (FIG. 1c). In FIG. 1c it is schematically shown that the formation of the silicide film continues until the Ni film has been completely consumed in the regions above exposed silicon. Above the silicon there is no Ni left to react. This process, generally referred to as RTP1 for the first rapid thermal processing step, is generally conducted at temperatures in the range of about 300-400° C.
After this process is finished, the substrate is exposed to a so-called selective metal etch. In this wet etch process, the unreacted Ni is etched while the NiSix film remains intact (see FIG. 1d). This results in a low-resistivity silicide on top of the gate, source, drain and any other exposed silicon surfaces. By removing the unreacted Ni, these structures are electrically isolated from each other. Usually, a subsequent anneal (RTP2) at, e.g., 450° C. is applied to ensure that the silicide film is made up of NiSi exclusively, for example, that the preceding Ni2Si phase formed during silicidation has completely reacted away. Typically, 100 nm Ni is converted into NiSi with a sheet resistance of ˜8 μΩcm.
Thus, in theory, the NiSix allows the formation of a conductive path with a low bulk resistivity and a good contact resistance. In practice, however, the inventors have found that the resistivity of these NiSix films is less than ideal because different films across the surface of a substrate can have different resistivities. Such variances are undesirable because they can introduce non-uniformities in the electrical performance of electrical devices formed using the NiSix films.
Accordingly, there is a need for methods of forming NiSix films having more uniform resistivities.